The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2009
Filed:
Dec. 01, 2006
Dominique P Bonneau, La Rochelle, FR;
Philippe Hauviller, Itteville, FR;
Vincent Vallet, Mennety, FR;
Dominique P Bonneau, La Rochelle, FR;
Philippe Hauviller, Itteville, FR;
Vincent Vallet, Mennety, FR;
International Business Machines Corporation, Armonk, NY (US);
Abstract
Disclosed herein is an improved serializer/deserializer (SERDES) circuit () having built-in self-test capabilities that is configured to perform an in-situ jitter sensitivity characterization of the clock and data recovery (CDR) circuit (). To that end, a delay perturbation is added to the serial data stream at the serializer () output, typically using a variable delay (DEL) line (). Then, the perturbed serial data stream is looped back to the CDR circuit. A dedicated circuit in the control logic () coupled to the DEL line and the deserializer circuit () analyzes the recovered data to characterize the sensitivity of the CDR circuit to the jitter frequency. By continuously modifying the output delay of said serial data stream, i.e. the amplitude and the frequency of the perturbation, one can generate a perturbed serial data stream, very close to the real jittered data.