The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2009

Filed:

Apr. 16, 2004
Applicant:

Marc Borremans, Korbeek-Dijle, BE;

Inventor:

Marc Borremans, Korbeek-Dijle, BE;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

An up conversion mixer has a Gilbert cell arrangement including an input amplification part for producing an amplified signal coupled to a multiplication part, the multiplication part being arranged to multiply the amplified signal by a local oscillator signal and output a mixed signal, the mixer also having a capacitor coupled from a node between the input amplification part and the multiplication part, to a power supply line, for suppressing unwanted high frequency signal components of the output signal of the multiplication part. The linearity of such mixers can be improved considerably by this impedance on the source node of the switch transistors. This capacitance can be placed to either VSS or to VDD. Notably this improvement can be achieved with low power consumption since no additional power is needed for the increased performance.


Find Patent Forward Citations

Borremans, Marc. (2009). Up converter mixer linearization improvement (U.S. Patent No. 7542739). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7542739

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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