The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2009

Filed:

Jul. 24, 2007
Applicants:

Hiroshi Maejima, Milpitas, CA (US);

Takumi Abe, Mountain View, CA (US);

Makoto Hamada, Mountain View, CA (US);

Inventors:

Hiroshi Maejima, Milpitas, CA (US);

Takumi Abe, Mountain View, CA (US);

Makoto Hamada, Mountain View, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/02 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory cell array in a semiconductor substrate has a plurality of memory cells arranged in rows and columns. A first circuit is located at one end of the memory cell array in a column direction. A second circuit is located at the other end of the memory cell array in the column direction. A first wire is located above the memory cell array between the first circuit and the second circuit. The first wire is located in a most upper layer in the semiconductor substrate to supply power to the second circuit.


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