The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2009

Filed:

Mar. 06, 2008
Applicants:

Eiji Yasuda, Osaka, JP;

Tadayoshi Nakatsuka, Osaka, JP;

Inventors:

Eiji Yasuda, Osaka, JP;

Tadayoshi Nakatsuka, Osaka, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

When a low level voltage is inputted to an input terminal IN, a transistor EFenters a blocked state, a first switch circuit SWenters a conduction state, and a second switch circuit SWenters the blocked state. Accordingly, a boosted voltage outputted from a voltage booster circuit CP is applied to a load R. When a high level voltage is inputted to the input terminal IN, the transistor EFenters the conduction state, the first switch circuit SWenters the blocked state, and the second switch circuit SWenters the conduction state. Accordingly, a voltage equivalent to that at the external power supply terminal VDD is applied to the load R. Therefore, although a current constantly flows through the transistor EFwhen the boosted voltage is not required, such situation does not affect a current supplied from the voltage booster circuit CP.


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