The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2009
Filed:
Apr. 19, 2007
Patrick Joseph Carberry, Laurys Station, PA (US);
Jeffery John Gilbert, Schwenksville, PA (US);
George John Libricz, Jr., Bethlehem, PA (US);
Ralph Salvatore Moyer, Robesonia, PA (US);
John William Osenbach, Kutztown, PA (US);
Hugo Fernando Safar, Westfield, NJ (US);
Thomas Herbert Shilling, Macungie, PA (US);
Patrick Joseph Carberry, Laurys Station, PA (US);
Jeffery John Gilbert, Schwenksville, PA (US);
George John Libricz, Jr., Bethlehem, PA (US);
Ralph Salvatore Moyer, Robesonia, PA (US);
John William Osenbach, Kutztown, PA (US);
Hugo Fernando Safar, Westfield, NJ (US);
Thomas Herbert Shilling, Macungie, PA (US);
Agere Systems Inc., Allentown, PA (US);
Abstract
A semiconductor device package comprises a container including a base and sidewalls. The base is configured to support a semiconductor device chip, and a lead frame extends through at least one of the sidewalls. A portion of the lead frame within the sidewall has at least one aperture penetrating into the lead frame. The sidewall material extends into the aperture, thereby forming a strong interfacial bond that provides a low leakage, sidewall-lead-frame interface. The base has a reentrant feature that is positioned within the thickness of at least one of the sidewalls and engages the at least one sidewall, thereby forming a low leakage base-sidewall interface. The top surface of the base has a groove that is positioned within the thickness of at least one of the sidewalls and engages the at least one sidewall, thereby enhancing the low leakage base-sidewall interface.