The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2009
Filed:
Oct. 30, 2006
Akiko Nomachi, Yokohama, JP;
Hideaki Harakawa, Kawasaki, JP;
Akiko Nomachi, Yokohama, JP;
Hideaki Harakawa, Kawasaki, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
A method of manufacturing a semiconductor device according to one aspect of the present invention comprises: forming a gate insulation film on a semiconductor substrate in which element separation regions are formed; depositing a gate lower layer material on the semiconductor substrate via the gate insulation film; depositing a gate upper layer material, which is composed of a material different from the gate lower layer material, on the gate lower layer material; forming a gate comprising a gate upper layer and a gate lower layer by selectively processing the gate upper layer material and the gate lower layer material; increasing the size of the gate upper layer in a horizontal direction with respect to the semiconductor substrate by carrying out a chemical reaction processing treatment to which the gate upper layer has a higher reaction speed than the gate lower layer; forming an impurity implantation region by implanting ions into the semiconductor substrate using the gate upper layer as a mask; and forming a source/drain diffusion layer from the impurity implantation region by carrying out a thermal diffusion treatment.