The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 02, 2009
Filed:
Oct. 23, 2006
Chan-liang Wu, Tainan County, TW;
Ming-cheng Chiu, Tainan County, TW;
Chien-pin Chen, Tainan County, TW;
Chan-Liang Wu, Tainan County, TW;
Ming-Cheng Chiu, Tainan County, TW;
Chien-Pin Chen, Tainan County, TW;
Himax Technologies Limited, Tainan County, TW;
Abstract
An integrated circuit with a reduced pad bump area and the manufacturing method thereof are disclosed. The integrated circuit includes a semiconductor substrate, an interconnection layer, a passivation layer, and at least a bump. The semiconductor substrate has a semiconductor device thereon. The interconnection layer is disposed on the semiconductor substrate and topped with a top metal layer which at least includes a bonding pad and a conductive line. The passivation layer is disposed on the interconnection layer and has at least an opening to expose the bonding pad. The bump is disposed on the passivation layer to connect the bonding pad through the opening and is extended to a coverage area not directly over the bonding pad.