The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 26, 2009

Filed:

Aug. 05, 2005
Applicants:

Christoph Bromberger, Heilbronn, DE;

Volker Dudek, Brackenheim, DE;

Inventors:

Christoph Bromberger, Heilbronn, DE;

Volker Dudek, Brackenheim, DE;

Assignee:

Atmel Germany GmbH, Heilbronn, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 9/455 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit layout having a first circuit connection, a second circuit connection, and active components is provided, whereby the active components each have an input connection and an output connection and a predefined maximum reverse voltage between the input connection and the output connection, and whereby a maximum value of a voltage swing, achieved between the first circuit connection and the second circuit connection, is greater than the predefined maximum reverse voltage. The circuit layout is characterized in that an input connection of an n-th active component is connected to an output connection of an (n−1)-th active component, and that the circuit layout changes the potentials of terminal gates of the (n−1)-th component and the n-th component synchronously to a control signal.


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