The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 2009
Filed:
May. 26, 2005
Ajay Nagarandal, San Jose, CA (US);
Ajay Nagarandal, San Jose, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Methods and apparatus for testing integrated circuits are provided. Integrated circuits sometimes contain repeating blocks of identical circuitry. Each identical circuit block contains scan chain registers that can be used to support testing. Each circuit block also has associated inputs and outputs. The inputs and outputs of the circuit blocks serve to interconnect each block to its neighboring blocks. An integrated circuit to be tested is described by a circuit netlist. The circuit netlist is processed to identify identical netlist modules. The repeating netlist modules correspond to the identical circuit blocks on the integrated circuit. By processing a given instance of a repeating netlist module, block-level test data can be generated. Global test data suitable for testing the entire integrated circuit can be generated from the block-level test data.