The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 26, 2009
Filed:
Oct. 08, 2004
Masato Taki, Aichi-ken, JP;
Hideki Tojima, Nagoya, JP;
Masato Taki, Aichi-ken, JP;
Hideki Tojima, Nagoya, JP;
Toyota Jidosha Kabushiki Kaisha, Toyota-shi, JP;
Abstract
A semiconductor apparatus () comprises a low potential reference circuit region () and a high potential reference circuit region (), and the high potential reference circuit region () is surrounded by a high withstand voltage separating region (). By a trench () formed in the outer periphery of the high withstand voltage separating region (), the low potential reference circuit region () and high potential reference circuit region () are separated from each other. Further, the trench () is filled up with an insulating material, and insulates the low potential reference circuit region () and high potential reference circuit region (). The high withstand voltage separating region () is partitioned by the trench (), high withstand voltage NMOS () or high withstand voltage PMOS () is provided in the partitioned position.