The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2009

Filed:

Dec. 27, 2001
Applicant:

Hiroo Nakano, Atsugi, JP;

Inventor:

Hiroo Nakano, Atsugi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A CPU and a memory are connected to each other through an address bus, a data bus, a read signal line and a write signal line. A read control signal and a write control signal transferred to the read signal line and the write signal line, respectively, are supplied to a control signal generating circuit. The control signal generating circuit detects a change in the read control signal and the write control signal transmitted to the read signal line and the write signal line, respectively, and then generates a control signal. The control signal generated by the control signal generating circuit is supplied to a pseudo-data generating circuit. The pseudo-data generating circuit generates pseudo-data comprising any random number data in accordance with the control signal and outputs the pseudo-data onto the data bus.


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