The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2009

Filed:

Jun. 12, 2006
Applicants:

David J. Greenhill, Portola Valley, CA (US);

Curtis R. Mcallister, Los Altos, CA (US);

Thomas R. Caron, Wakefield, MA (US);

Shanker Bhagvat, San Jose, CA (US);

Inventors:

David J. Greenhill, Portola Valley, CA (US);

Curtis R. McAllister, Los Altos, CA (US);

Thomas R. Caron, Wakefield, MA (US);

Shanker Bhagvat, San Jose, CA (US);

Assignee:

Sun Microsystems, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit test system. The test system includes a controller and an integrated circuit coupled to a voltage source and a current monitor. The controller causes the voltage source to supply a voltage to the integrated circuit, receives a signal from the current monitor indicating a power dissipation of the integrated circuit, and causes the voltage source to reduce the voltage until the signal from the current monitor indicates the power dissipation of the integrated circuit is less than a predetermined threshold. The controller stores in the integrated circuit in a non-volatile storage register that is accessible via a subset of access pins, a value corresponding to the voltage supplied to the integrated circuit when the power dissipation of the integrated circuit is less than the predetermined threshold. The subset of access pins provides at least one function in addition to accessing the non-volatile storage register.


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