The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 05, 2009
Filed:
Feb. 17, 2005
Yuan Xing Lee, San Jose, CA (US);
Morishi Izumita, Tokyo, JP;
Yuan Xing Lee, San Jose, CA (US);
Morishi Izumita, Tokyo, JP;
Hitachi Global Storage Technologies Netherlands B.V., Amsterdam, NL;
Abstract
Embodiments of the present invention provide techniques for generating MTR codes with ECC without the use of a second MTR code, while still satisfying the specified constraint. In one embodiment, a system for processing data comprises a maximum transition run or timing-varying maximum transition run (hereinafter MTR) encoder configured to encode input data sequence from a hard disk controller into an MTR coded sequence which satisfies a j-constraint; an error correction code (ECC) encoder configured to generate ECC check bits for the MTR coded sequence; and a bit-level interleaving and substitution module configured to interleave the generated ECC check bits into the MTR coded sequence by stuffing the generated ECC check bits at boundaries of MTR coded blocks of the MTR coded sequence, to determine if a violation of the j-constraint has occurred at the boundaries of the MTR coded blocks, and to perform substitution of bits at a boundary of the MTR coded blocks to maintain the j-constraint if a violation of the j-constraint has occurred.