The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2009

Filed:

May. 31, 2006
Applicant:

Natsuki Kushiyama, Kawasaki, JP;

Inventor:

Natsuki Kushiyama, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01);
U.S. Cl.
CPC ...
Abstract

A data sampling circuit has a receiver which receives an embedded clock obtained by multiplexing a clock signal and data, a phase comparator which outputs a phase difference signal by performing a phase comparison between the embedded clock and a first reference clock signal, a phase interpolator which adjusts a phase of the first reference clock signal and generates a second reference clock signal having a phase different from the phase of the first reference clock signal by 90°, based on the phase difference signal, a feedback controller which conforms the phase of the first reference clock signal with the phase of the embedded clock by feedback control using the phase comparator and the phase interpolator, a sampling controller which performs phase interpolation of the second reference clock signal at higher speed than the feedback control of the first feedback loop based on the phase difference signal, and a sampling circuit which samples the embedded clock received by the receiver in synchronization with the second reference clock signal obtained by phase interpolation of the sampling controller.


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