The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2009

Filed:

Oct. 05, 2007
Applicants:

Darren L. Anand, Essex Junction, VT (US);

Gregory J. Fredeman, Wappingers Falls, NY (US);

Toshiaki Kirihata, Poughkeepsie, NY (US);

Alan J. Leslie, Wappingers Falls, NY (US);

John M. Safran, Wappingers Falls, NY (US);

Inventors:

Darren L. Anand, Essex Junction, VT (US);

Gregory J. Fredeman, Wappingers Falls, NY (US);

Toshiaki Kirihata, Poughkeepsie, NY (US);

Alan J. Leslie, Wappingers Falls, NY (US);

John M. Safran, Wappingers Falls, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for determining the state of a programmable resistive memory element includes passing a first level of current through a fuse leg and a reference resistance leg of a test circuit including the programmable resistive memory element; detecting a differential signal developed between a reference node and a fuse node of the test circuit as a result of the first level of current; passing a second level of current through the fuse leg and the reference leg of a test circuit, the second level of current being higher than the first level of current so as to enable detection of trip resistance of the test circuit at a lower value than with respect to the first level of current; and detecting a differential signal developed between the reference node and the fuse node of the test circuit as a result of the second level of current.


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