The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 28, 2009
Filed:
May. 05, 2005
Yutaka Takafuji, Nara, JP;
Katsunori Shirai, Nara, JP;
Akira Shibazaki, Nara, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
Each of a gate driver and a source driver periodically receives a clock signal and a start pulse, where the start pulse has a certain width and is shifted as shift data in the gate driver or source driver in synchronism with the clock signal. A logic circuit composed of an NAND gate and an inverter receives the start pulse and the shift data, the shift data being the output that is supplied after a predetermined delay from the last stage with respect to the shift direction. The output of the inverter is used to test scanning circuits. This provides a display device and a scanning circuit testing method, which enable the scanning circuits to be judged both surely and quickly, without increasing the area or complexity of the circuit.