The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2009
Filed:
Sep. 09, 2005
Kamal Patel, Campbell, CA (US);
Kamal Patel, Campbell, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A logic design system is provided for designing programmable logic device integrated circuits with minimized simultaneous switching noise. The logic design system identifies input-output drivers that are associated with simultaneous switching noise groups by examining a netlist for a circuit design for a programmable logic device. Simultaneous switching noise is minimized by making adjustments to programmable operating parameters for the input-output drivers. The logic design system may make adjustments such as adjustments to programmable drive strengths, programmable slew rates, and programmable on-chip termination resistances. During place and route operations, the logic design system makes placement decisions that help to minimize simultaneous switching noise.