The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2009

Filed:

Jan. 04, 2007
Applicants:

Gabriele Pelli, Mortara, IT;

Lorenzo Bedarida, Vimercate, IT;

Massimiliano Frulio, Milan, IT;

Andrea Bettini, Cavenago Brianza, IT;

Inventors:

Gabriele Pelli, Mortara, IT;

Lorenzo Bedarida, Vimercate, IT;

Massimiliano Frulio, Milan, IT;

Andrea Bettini, Cavenago Brianza, IT;

Assignee:

Atmel Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A current mirror circuit includes a first current-mirror transistor coupled to a second current-mirror transistor. A load is coupled to the second current-mirror transistor. A first current source is coupled to the first current-mirror transistor to cause a bias current to flow through the first current-mirror transistor and a second current source is coupled to the second current-mirror transistor and in parallel with the load to shunt the bias current away from the load.


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