The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2009
Filed:
Aug. 06, 2004
Yoshihiko Satsukawa, Kawasaki, JP;
Yoshihiko Satsukawa, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A layout structure for a CMOS circuit comprises a transistor layer forming P-type transistorsandand N-type transistorsandand a resistor layer which includes a resistorformed to have a predetermined length and to make plural appropriate portions or the entire of the resistor along a direction of the length satisfy a mask rule necessary for providing VIAs, the resistor being connected to appropriate connecting portions of the P-type transistors and the N-type transistors through the VIAs by metal wiresformed of a metal layer, and the resistor having a predetermined circuit resistance which can be set based on the positions of the appropriate connecting portions.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile