The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2009

Filed:

Nov. 01, 2006
Applicant:

Toshio Sunaga, Ohtsu, JP;

Inventor:

Toshio Sunaga, Ohtsu, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

The objective of the present invention is to provide a semiconductor storage device wherein a low active current is obtained by reducing the number of sense amplifiers to be activated at a time. An SDRAM has a divided word line structure, and includes a plurality of banks, each of which includes arrays ARto ARand 4K main word lines MWL. A row address signal is fetched in response to a row address strobe signal, and a segment address signal is fetched in response to a column address strobe signal. A main row decoder MRD activates main word lines MWL, MWL, MWLand MWLin response to the row address signal, and a segment row decoder SRD selects only an array ARin response to a segment address signal, and activates only 1K sense amplifiers SA corresponding to the selected array AR. When the main word lines MWL, MWL, MWLand MWLare activated, the segment word lines in arrays ARto ARare not activated, so that data are not destroyed.


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