The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2009

Filed:

Jun. 25, 2007
Applicants:

Tomoyuki Fujisawa, Hyogo, JP;

Hikaru Shibahara, Hyogo, JP;

Hidenori Mitani, Hyogo, JP;

Akihiko Kanda, Hyogo, JP;

Inventors:

Tomoyuki Fujisawa, Hyogo, JP;

Hikaru Shibahara, Hyogo, JP;

Hidenori Mitani, Hyogo, JP;

Akihiko Kanda, Hyogo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 11/34 (2006.01); G11C 16/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory cell of a memory array stores two bits. A memory array sense amplifier provides two bits in a verify operation. Two bits in a page buffer stores a write target value for the corresponding memory cell. Each bit in a mask buffer stores a value defining processing to be effected on the corresponding memory cell. A write driver applies a write pulse when the bit in the mask buffer corresponding to the selected memory cell is '0'. A verify circuit compares the two bits provided from the memory array sense amplifier with the corresponding two bits in the page buffer, and changes the corresponding bit in the mask buffer from '0' to “1” when the result of the comparison represents matching.


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