The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2009
Filed:
Mar. 01, 2007
Masanori Shirahama, Shiga, JP;
Yasuhiro Agata, Osaka, JP;
Yasue Yamamoto, Osaka, JP;
Hirohito Kikukawa, Osaka, JP;
Masanori Shirahama, Shiga, JP;
Yasuhiro Agata, Osaka, JP;
Yasue Yamamoto, Osaka, JP;
Hirohito Kikukawa, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
In a semiconductor memory device including resistance change memory devices, when a resistance change memory device is in standby mode, the two terminals of the resistance change memory device, i.e., a bit line and a source line, are set at a precharge potential Vp, respectively. At the time of a set operation, the bit line is set to a set voltage Vd, which is higher than the precharge potential Vp, while the source line is grounded. At the time of a reset operation, bit line is grounded, while the source line is set to the set voltage Vd. At the time of a data-read operation, the source line is grounded by a read bias generation circuit, while the potential of the bit line is kept at the precharge potential Vp.