The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2009

Filed:

Jan. 30, 2007
Applicant:

Jonathon C. Stiff, Moscow, ID (US);

Inventor:

Jonathon C. Stiff, Moscow, ID (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

A delay limit detect circuit can determine the delay of a current steering delay cell, like those utilized in a voltage controlled oscillator (VCO), by monitoring a current (I) that tracks a delay cell current (I). When the monitored current (I) outside of a limit, a signal LIMIT can be activated. A monitored current (I) can be generated by a control replica circuit having the same circuit component types as a control circuit within a delay cell. Such limit detection can provide a way to prevent a ring VCO from entering a runaway state, particularly in cases where a maximum frequency can be reached before a maximum control voltage is reached.


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