The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2009
Filed:
Sep. 11, 2007
Riccardo Locatelli, Grenoble, FR;
Marcello Coppola, Moirand, FR;
Daniele Mangano, Messina, IT;
Luca Fanucci, Montecatini Terme, IT;
Franscesco Vitullo, Matera, IT;
Dario Zandri, Follonica, IT;
Nicola L'insalata, Mola Di Bari, IT;
Riccardo Locatelli, Grenoble, FR;
Marcello Coppola, Moirand, FR;
Daniele Mangano, Messina, IT;
Luca Fanucci, Montecatini Terme, IT;
Franscesco Vitullo, Matera, IT;
Dario Zandri, Follonica, IT;
Nicola L'Insalata, Mola Di Bari, IT;
STMicroelectronics SA, Montrouge, FR;
Abstract
A synchronization system to synchronize modules (TX, RX) in an integrated circuit, such as a VLSI integrated circuit, in which the modules receive respective first and second clock signals (TX_CLK, RX_CLK) having a same frequency but being shifted by a constant and unknown phase difference. The system includes a first latch means for latching and delivering data in synchronism with the first clock signal and second latch means for latching data issued from the first latch means and delivering data in synchronism with the second clock signal, first and second latch means being controlled by first and second control signals (strobe_W, strobe_R) elaborated respectively from said first and second clock signals and one of said first and second control signal being shifted by an amount corresponding at least to the set-up time of at least one of said first and second latch means.