Semiconductor structure, particularly in a semiconductor detector, and associated operating method

Abstract

Semiconductor detector includes semiconductor substrate (HK), source region (S), drain region (D), external gate region (G) and inner gate region (IG) for collecting free charge carriers generated in semiconductor substrate, wherein inner gate region is arranged in semiconductor substrate at least partially under external gate region to control conduction channel (K) from below as a function of the accumulated charge carriers, as well as with clear contact (CL) for the removal of the accumulated charge carriers from inner gate region, as well as with drain-clear region (DCG) that can be selectively controlled as an auxiliary clear contact or as a drain. Barrier contact (B) is arranged in a lateral direction between external gate region and drain-clear region to build up a controllable potential barrier between inner gate region and clear contact that prevents the charge carriers accumulated in inner gate region from being removed by suction from clear contact.