Method for fabricating nanoscale features

Abstract

One embodiment of the present invention is a method for fabricating a nanoscale shift register. In a described embodiment, a nanoimprinting-resist layer applied above a silicon-on-insulator substrate is nanoimprinted to form troughs and trough segments. The silicon layer exposed at the bottom of the troughs and trough segments is then etched, and a conductive material is deposited into the troughs to form nanowires and into the trough segments to form nanowire segments. The exposed surfaces of nanowires are coated with a protective coating, and the conductive material of the nanowire segments is then removed to produce trough segments etched through the nanoimprinting resist and the silicon layer. A dielectric column between configurably resistive columns in orientations non-parallel with the orientation of the nanowires is fabricated above the nanowires, gate signal lines are fabricated above, and parallel with, the dielectric column, and latch-control signal lines are fabricated above, and parallel with, the configurably resistive columns. Additional embodiments of the present invention are directed to fabricating devices and circuits with nanoscale features by partitioning the nanoscale features into sets, and separately coating the features of each set prior to one or more subsequent steps.