The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2009
Filed:
Feb. 21, 2006
Stephen J. Barnfield, New York, NY (US);
Subhrajit Bhattacharya, White Plains, NY (US);
Daniel R. Knebel, Mahopac, NY (US);
Stephen V. Kosonocky, Wilton, CT (US);
Stephen J. Barnfield, New York, NY (US);
Subhrajit Bhattacharya, White Plains, NY (US);
Daniel R. Knebel, Mahopac, NY (US);
Stephen V. Kosonocky, Wilton, CT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method, system and computer program product for modeling and simulating a powergated hierarchical element of an integrated circuit is disclosed. In modeling a powergated macro, the invention does not model all logic gates or elements as powergated, instead, the invention only models latches as connected to an integrated switch to be powergated. In addition, a fence circuit attached to the powergated macro is modeled as including an extra control signal to force a powergated state of the powergated macro into the fence circuit.