The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2009
Filed:
Feb. 09, 2005
Mark Andrew Brittain, Pflugerville, TX (US);
Warren Edward Maule, Cedar Park, TX (US);
Gary Alan Morrison, Austin, TX (US);
Jeffrey Adam Stuecheli, Austin, TX (US);
Mark Andrew Brittain, Pflugerville, TX (US);
Warren Edward Maule, Cedar Park, TX (US);
Gary Alan Morrison, Austin, TX (US);
Jeffrey Adam Stuecheli, Austin, TX (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A set of N copies of bank control logic are provided for tracking the banks within the memory modules (DRAMS). When the total number of banks within the memory module(s) is greater than N, the addresses of particular banks are folded into a single grouping. The banks are represented by the N copies of the bank control logic even when the total number of banks is greater than N. Each bank within the group is tagged as being busy when any one of the banks in the group is the target of a memory access request. The algorithm folds the addresses of the banks in an order that substantially minimizes the likelihood that a bank that is in a busy or false busy state will be the target of another memory access request. Power and logic savings are recognized as only N copies of bank control logic have to be supported.