The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 07, 2009

Filed:

Sep. 27, 2007
Applicants:

Alan Chen, Saratoga, CA (US);

Neville Ichhaporia, San Jose, CA (US);

Vijay P. Adusumilli, San Jose, CA (US);

Stephen Trinh, San Jose, CA (US);

Inventors:

Alan Chen, Saratoga, CA (US);

Neville Ichhaporia, San Jose, CA (US);

Vijay P. Adusumilli, San Jose, CA (US);

Stephen Trinh, San Jose, CA (US);

Assignee:

Atmel Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/06 (2006.01); G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A column redundancy system for a non-volatile memory includes a separate companion controller chip that includes a column redundancy RAM memory array for storing addresses of defective non-volatile memory cells. Column redundancy match logic provides a match output signal corresponding to a match of a particular user input address for the non-volatile memory with the address of a defective non-volatile memory cell, the collection of said addresses stored in the column redundancy RAM memory array. Column redundancy replacement logic, in response to a match output, dynamically substitutes correct data associated with a defective non-volatile memory cell into an I/O program or read data bit stream of the non-volatile memory chip.


Find Patent Forward Citations

Loading…