The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2009
Filed:
Feb. 27, 2007
Applicants:
Pantas Sutardja, San Jose, CA (US);
Chi Fung Cheng, San Jose, CA (US);
Inventors:
Pantas Sutardja, San Jose, CA (US);
Chi Fung Cheng, San Jose, CA (US);
Assignee:
Marvell International, Ltd., Hamilton, BM;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11B 5/09 (2006.01);
U.S. Cl.
CPC ...
Abstract
A pre-compensation circuit comprises a clock delay generator that generates clock delay data based on a clock signal having a first clock rate. A reference clock delay unit receives the clock signal and generates reference clock delay information based on the first clock rate. A calibration unit receives the reference clock delay information and calibrates each of n clock delay units based on the reference clock delay information and a change in the first clock rate, wherein n is an integer greater than 1.