The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 07, 2009
Filed:
Apr. 10, 2006
Omar Zia, Austin, TX (US);
Da Zhang, Austin, TX (US);
Venkat R. Kolagunta, Austin, TX (US);
Narayanan C. Ramani, Austin, TX (US);
Bich-yen Nguyen, Austin, TX (US);
Omar Zia, Austin, TX (US);
Da Zhang, Austin, TX (US);
Venkat R. Kolagunta, Austin, TX (US);
Narayanan C. Ramani, Austin, TX (US);
Bich-Yen Nguyen, Austin, TX (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A process of forming an electronic device can include forming an insulating layer over first and second active regions, and a field isolation region. The process can also include forming a seed layer and exposing the first active region. The process can further include selectively forming a first and second semiconductor layer over the first active region and the seed layer, respectively. The first and second semiconductor layers can be spaced-apart from each other. In one aspect, the process can include selectively forming the first and second semiconductor layers simultaneously at a substantially same point in time. In another aspect, an electronic device can include first and second transistor structures separated by a field isolation region and electrically connected by a conductive member. A semiconductor island, designed to be electrically floating, can lie between the conductive member and the base layer.