The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2009

Filed:

Jan. 17, 2006
Applicants:

Leo J. Clark, Georgetown, TX (US);

Guy L. Guthrie, Austin, TX (US);

William J. Starke, Round Rock, TX (US);

Jeffrey A. Stuecheli, Austin, TX (US);

Derek E. Williams, Austin, TX (US);

Inventors:

Leo J. Clark, Georgetown, TX (US);

Guy L. Guthrie, Austin, TX (US);

William J. Starke, Round Rock, TX (US);

Jeffrey A. Stuecheli, Austin, TX (US);

Derek E. Williams, Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A cache coherent data processing system includes at least first and second coherency domains. In a first cache memory within the first coherency domain of the data processing system, a memory block is held in a storage location associated with an address tag and a coherency state field. A determination is made if a home system memory assigned an address associated with the memory block is within the first coherency domain. If not, the coherency state field is set to a coherency state that indicates that the address tag is valid, that the storage location does not contain valid data, the first coherency domain does not contain the home system memory, and that, following formation of the coherency state, the memory block is cached outside of the first coherency domain.


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