The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 31, 2009
Filed:
Mar. 29, 2005
Kwang Sik OH, Kyongsangbuk-do, KR;
Myung Woo Nam, Kyongsangbuk-do, KR;
Ki Du Cho, Kumi-shi, KR;
SE Jong Shin, Taegu-kwangyokshi, KR;
Bong Chul Kim, Taegu-kwangyokshi, KR;
Kwon Seob Choi, Cheongju-shi, KR;
Kwang Sik Oh, Kyongsangbuk-do, KR;
Myung Woo Nam, Kyongsangbuk-do, KR;
Ki Du Cho, Kumi-shi, KR;
Se Jong Shin, Taegu-kwangyokshi, KR;
Bong Chul Kim, Taegu-kwangyokshi, KR;
Kwon Seob Choi, Cheongju-shi, KR;
LG Display Co., Ltd., Seoul, KR;
Abstract
An LCD device and a method for manufacturing the same is disclosed in which the manufacturing process is simplified by etching an overcoat layer and a lower insulating layer at the same time. Disclosed is a method for manufacturing the LCD device that includes forming a thin film transistor (TFT) on an active region of a substrate, forming a gate pad region and data pad region, and forming a passivation layer on the entire surface of the substrate. The manufacturing method further includes forming an overcoat layer and selectively etching the overcoat layer. Contact holes for the pixel electrode, the gate pad, and the data pad are formed by selectively etching the overcoat layer, the passivation layer, and the gate insulating layer though one process.