The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 31, 2009

Filed:

Jul. 19, 2005
Applicant:

Thaddeus John Gabara, Murray Hill, NJ (US);

Inventor:

Thaddeus John Gabara, Murray Hill, NJ (US);

Assignee:

LCtank LLC, Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B 5/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

CMOS LC tank circuits and flux linkage between inductors can be used to distribute and propagate clock signals over the surface of a VLSI chip or processor. The tank circuit offers an adiabatic behavior that recycles the energy between the reactive elements and minimizes losses in a conventional sense. Flux linkage can be used to orchestrate a number of seemingly individual and distributed CMOS LC tank circuits to behave as one unit. In one example, the distribution of a 45° separated multi-phase balanced oscillations over the surface of die 1.6 cm×1.6 cm at 10 GHz is expected to dissipate under 10 W and offers a potential to significantly reduce the road map predictions of 100 W. Simulations of several CMOS tank circuits indicate that the power dissipation can be reduced an order of magnitude when compared to conventional techniques. A passive flux linkage, mechanical, and finite state machine technique of frequency adjustment of an oscillator are described.


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