The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2009

Filed:

Apr. 25, 2006
Applicants:

Rajat Chaudhry, Austin, TX (US);

Tilman Gloekler, Gaertringen, DE;

Daniel L. Stasiak, Austin, TX (US);

Todd E. Swanson, Round Rock, TX (US);

Inventors:

Rajat Chaudhry, Austin, TX (US);

Tilman Gloekler, Gaertringen, DE;

Daniel L. Stasiak, Austin, TX (US);

Todd E. Swanson, Round Rock, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A computer implemented power optimization method that generates statistics relating to the clock gating of a set of components in a VLSI design. A set of components, including those components which are not clock gated, are identified. The generation of statistics related to clock gating testing identify whether one or more components of the set of components may be clock gated.


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