The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2009
Filed:
Oct. 26, 2005
Siddharth Gupta, Bangalore, IN;
Yannick Martelloni, Poing, DE;
Siddharth Gupta, Bangalore, IN;
Yannick Martelloni, Poing, DE;
Infineon Technologies AG, Munich, DE;
Abstract
A memory arrangement, particularly a ROM, having memory cells, local virtual supply voltage lines, word lines and result lines may also include global virtual supply voltage lines that run along the width of the memory arrangement parallel to the word lines. The local virtual supply voltage lines run parallel to the result lines, and perpendicularly to the word lines where the each local virtual supply voltage line runs only within a block of the memory arrangement. Each global virtual supply voltage line, in each block through which it runs, is connected to one local virtual supply voltage line. The coupling capacitance between the supply voltage lines and the result lines, and the inherent capacitance of the supply voltage lines are reduced, reducing the power consumption and increasing the clock frequency of the memory arrangement.