The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2009
Filed:
Nov. 06, 2006
Andrew Cowell, Greytown, NZ;
David Wayne Ritter, San Jose, CA (US);
Andrew Cowell, Greytown, NZ;
David Wayne Ritter, San Jose, CA (US);
Micrel, Incorporated, San Jose, CA (US);
Abstract
An LDO regulator includes two linear regulator circuits and an internal priority logic scheme that favors generating a regulated output voltage using a regulated supply voltage over an unregulated supply voltage. The unregulated supply voltage is applied to a first input terminal from a raw voltage source. The regulated supply voltage is applied to a second input terminal from, for example, a switching (e.g., BUCK) regulator. Two output devices are respectively connected between the first and second input terminals and the LDO output terminal. The first regulator circuit causes the first output device to supply the desired regulated output voltage while the switching regulator ramps up. Once the regulated supply voltage is high enough to allow regulation, the internal priority logic scheme disables the first regulator circuit, whereby the desired regulated output voltage is generated solely by the second regulator circuit through the second output device.