The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7508177 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 24, 2009

Filed:

Jun. 08, 2007
Applicants:

Masami Aiura, Sendai, JP;

Satoshi Takahashi, Sendai, JP;

Inventors:

Masami Aiura, Sendai, JP;

Satoshi Takahashi, Sendai, JP;

Assignee:

Freescale Semiconductor, Inc., Houston, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/575 (2006.01); G05F 1/563 (2006.01);
U.S. Cl.
CPC ...
Abstract

A regulator circuit for reducing the output noise when regulators are switched includes a linear regulator and a switching regulator. The linear regulator generates a first regulator voltage from an input voltage with a first feedback loop. The switching regulator generates a second regulator voltage from the input voltage with a second feedback loop, which is connected to the first feedback loop. A loop control circuit controls the first feedback loop so as to lower the first regulator voltage when the switching regulator is activated.


Find Patent Forward Citations

Aiura, Masami. (2009). Method and circuit for reducing regulator output noise (U.S. Patent No. 7508177). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7508177

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…