The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7508026 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 24, 2009

Filed:

Nov. 02, 2005
Applicants:

Naohisa Iino, Yokohama, JP;

Fumitaka Arai, Yokohama, JP;

Inventors:

Naohisa Iino, Yokohama, JP;

Fumitaka Arai, Yokohama, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 27/115 (2006.01);
U.S. Cl.
CPC ...
Abstract

A non-volatile semiconductor memory device has a gate insulating film formed on a semiconductor substrate between isolation regions, a first gate electrode formed on the gate insulating film, an intergate insulating film formed on the first gate electrode, and a second gate electrode formed on the intergate insulating film. The first gate electrode has a first part positioned between isolation insulating films, a second part positioned on the first part and having a partial portion positioned on the isolation region, and a third part positioned on the second part. A width of the third part is set narrower than that of the second part.


Find Patent Forward Citations

Iino, Naohisa. (2009). Non-volatile semiconductor memory device having a two-layer gate electrode transistor and method of manufacturing the device (U.S. Patent No. 7508026). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7508026

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…