The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7507102 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 24, 2009

Filed:

Oct. 02, 2007
Applicants:

Justin Potok Bandholz, Cary, NC (US);

Jonathan Randall Hinkle, Raleigh, NC (US);

Clifton Ehrich Kerr, Durham, NC (US);

John Frank Nations, Jr., Raleigh, NC (US);

William James Sommerville, Raleigh, NC (US);

Inventors:

Justin Potok Bandholz, Cary, NC (US);

Jonathan Randall Hinkle, Raleigh, NC (US);

Clifton Ehrich Kerr, Durham, NC (US);

John Frank Nations, Jr., Raleigh, NC (US);

William James Sommerville, Raleigh, NC (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01R 4/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Method and apparatus for installing a processor into electronic communication with a socket. The land grid array socket connector includes a socket housing secured to a circuit board and an array of upwardly extending pins for electronic communication with contact pads on the processor. The socket connector provides a carriage configured to receiving the processor through a lateral opening and support a perimeter edge of the processor. A mechanical linkage couples the carriage and the socket housing for substantially vertically translating the processor relative to the socket. A plurality of alignment features upwardly extends from the socket housing along the perimeter of the array of pins. Each of the alignment features has an inwardly-facing tapered surface for registering the edge of the processor and biasing the processor into a position where the array of contact pads are aligned with the array of pins as the processor is lowered.


Find Patent Forward Citations

Bandholz, Justin. (2009). Method for horizontal installation of lga socketed chips (U.S. Patent No. 7507102). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7507102

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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