The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 2009
Filed:
Jul. 31, 2003
Leon Maria Albertus Van DE Logt, Eindhoven, NL;
Franciscus Gerardus Maria DE Jong, Eindhoven, NL;
Leon Maria Albertus Van De Logt, Eindhoven, NL;
Franciscus Gerardus Maria De Jong, Eindhoven, NL;
NXP B.V., Eindhoven, NL;
Abstract
An integrated circuit () has a plurality of inputs () and a plurality of outputs (). In a test mode, a test arrangement including a plurality of logic gates () is coupled between the plurality of inputs () and the plurality of outputs (). The logic gates from the plurality of logic gates () have a first input coupled to an input of the plurality of inputs () and a further input coupled to a fixed logic value source (). The fixed logic value source () is used to define an identification code of the integrated circuit (), which can be retrieved at the plurality of outputs () when an appropriate bit pattern is fed to the plurality of inputs ().