The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2009

Filed:

Apr. 05, 2005
Applicants:

Brian T. Brunn, Austin, TX (US);

Firas N. Abughazaleh, Austin, TX (US);

Inventors:

Brian T. Brunn, Austin, TX (US);

Firas N. Abughazaleh, Austin, TX (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 7/02 (2006.01); H03D 3/24 (2006.01);
U.S. Cl.
CPC ...
Abstract

The multi-mode phase and data detector includes a phase detector and a charge pump. A plurality of latching blocks clocked on complimentary phases of a feedback signal produces a plurality of phase and transition signals. Based on a selectable bias level, latched comparators in the latching blocks operate to detect the multi-level input data signal as it crosses a plurality of threshold levels. Logic within the multi-mode phase and data detector selects subsets of exclusive OR gates from sets of exclusive OR gates and subsets of the latching comparators to place the multi-mode phase and data detector in one of a PAM-4, NRZ, or PRML mode of operation. The logic further selects subsets of latched comparators from the plurality of parallel coupled latches to further define the mode of operation of the multi-mode phase and data detector.


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