The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2009

Filed:

Aug. 21, 2006
Applicants:

Imre Knausz, Fairport, NY (US);

Robert J. Bowman, Fairport, NY (US);

Inventors:

Imre Knausz, Fairport, NY (US);

Robert J. Bowman, Fairport, NY (US);

Assignees:

National Semiconductor Corporation, Santa Clara, CA (US);

Rochester Institute of Technology, Rochester, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/78 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system and method are disclosed for providing an ultra low power scalable digital-to-analog converter architecture. Refresh buffer circuits are provided to buffer a voltage reference resistor string. The refresh buffer circuits may be coupled to the resistor string at selected binary fold points. The refresh buffer circuits can reduce the output impedance of the resistor string. Also, each digital-to-analog converter channel can be provided with a multi-dimensional multiplexer that minimizes settling time. The number of refresh buffer circuits and the number of dimensions of the multiplexer can be selected to maximize circuit performance for a given load capacitance and bit rate of the digital-to-analog converter.


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