The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 17, 2009
Filed:
Oct. 07, 2004
Chang Ho Noh, Gyeonggi-Do, KR;
Ki Yong Song, Seoul, KR;
Jin Young Kim, Gyeonggi-Do, KR;
Tamara Byk, Gyeonggi-Do, KR;
Gennady A. Branitsky, Minsk, BY;
Tatyana V. Gaevskaya, Minsk, BY;
Valeri G. Sokolov, Minsk, BY;
Chang Ho Noh, Gyeonggi-Do, KR;
Ki Yong Song, Seoul, KR;
Jin Young Kim, Gyeonggi-Do, KR;
Tamara Byk, Gyeonggi-Do, KR;
Gennady A. Branitsky, Minsk, BY;
Tatyana V. Gaevskaya, Minsk, BY;
Valeri G. Sokolov, Minsk, BY;
Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;
Abstract
Disclosed herein is a method for forming a metal pattern with a low resistivity. The method comprises the steps of: (i) coating a photocatalytic compound onto a substrate to form a photocatalytic film layer; (ii) coating a water-soluble polymeric compound onto the photocatalytic film layer to form a water-soluble polymer layer; (iii) selectively exposing the two layers to light to form a latent pattern acting as a nucleus for crystal growth; and (iv) plating the latent pattern with a metal to grow metal crystals thereon. According to the method, a multilayer wiring pattern including a low resistivity metal can be formed in a relatively simple manner at low cost, and the metals constituting the respective layers can be freely selected according to the intended application. The low resistivity metal pattern can be advantageously applied to flat panel display devices, e.g., LCDs, PDPs and ELDs.