The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2009

Filed:

Jan. 25, 2005
Applicants:

Mihai Adrian Tiberiu Sanduleanu, Eindhoven, NL;

Eduard Ferdinand Stikvoort, Eindhoven, NL;

Idrissa Cissé, L'Hay les Roses, FR;

Inventors:

Mihai Adrian Tiberiu Sanduleanu, Eindhoven, NL;

Eduard Ferdinand Stikvoort, Eindhoven, NL;

Idrissa Cissé, L'Hay les Roses, FR;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A latch circuit comprising, a differential input with a non-inverting input (D+) and an inverting input (D−). The latch further comprises a differential output with a non-inverting output (Q+) and an inverting output (Q−). One of the outputs (Q−) is coupled to one of the inputs input (D+) having an opposite polarity. The latch further comprises a control input for receiving a control signal (V) for determining a threshold for an input signal (In) such that if the input signal is at larger than the threshold the non-inverting output is in a HIGH logic state and in a LOW state if the input signal is smaller than the threshold.


Find Patent Forward Citations

Loading…