The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2009

Filed:

Dec. 20, 2007
Applicants:

Anthony Correale, Jr., Raleigh, NC (US);

Thomas A. Dick, Raleigh, NC (US);

Sven E. Meier, Boston, MA (US);

Robert K. Montoye, Jersey City, NJ (US);

Inventors:

Anthony Correale, Jr., Raleigh, NC (US);

Thomas A. Dick, Raleigh, NC (US);

Sven E. Meier, Boston, MA (US);

Robert K. Montoye, Jersey City, NJ (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A scannable limited switch dynamic logic (LSDL) circuit including a data input and a data output, a combinational logic circuit in communication with the data input, a pre-charge circuit in communication with the combinational logic circuit, a footer circuit in communication with the combinational logic, a keeper circuit in communication with the combinational logic circuit and the pre-charge circuit, a scan input connected to the data input, a scan input circuit in communication with the scan input, the combinational logic circuit, the pre-charge circuit, and the keeper circuit, a modified inverter circuit in communication with the combinational logic circuit, the pre-charge circuit, the keeper circuit, and the scan input circuit, a parallel gate circuit in communication with the modified inverter circuit, a series gate circuit in communication with the modified inverter circuit and the parallel gate circuit, a feedback inverter connected between an internal node and a feedback node, and an output buffer connected between the internal node and the data output.


Find Patent Forward Citations

Loading…