The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2009

Filed:

Mar. 21, 2007
Applicants:

Shoichi Nitta, Osaka-fu, JP;

Masahiro Matsuo, Hyogo-ken, JP;

Inventors:

Shoichi Nitta, Osaka-fu, JP;

Masahiro Matsuo, Hyogo-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/62 (2006.01); G05F 1/618 (2006.01);
U.S. Cl.
CPC ...
Abstract

A DC-DC converting apparatus including a step-up and step-down circuit stepping up/down an input voltage to generate an output voltage and a PWM control circuit. The PWM control circuit generates an error signal, first to third voltages, a first triangular wave signal varying between the first and second voltages, and a second triangular wave signal varying between the third voltage and a fourth voltage determined based on the first to third voltages. The PWM control circuit compares the error signal with the first and second triangular wave signals and causes the step-up and step-down circuit to step up/down the input voltage based on the comparison. The first to fourth voltages V1 to V4 satisfy V1<V4<V2<V3 and V4=V3−(V2−V1). At least one of the first to third voltages is variably set to make a time in which voltage ranges of the first and second triangular wave signals overlap longer than a delay time caused by the comparison.


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