The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 10, 2009
Filed:
Jan. 20, 2006
Jang-soo Kim, Gyeonggi-do, KR;
Soo-jin Kim, Gyeonggi-do, KR;
Kyoung-tai Han, Gyeonggi-do, KR;
Hee-hwan Choe, Incheon-si, KR;
Joo-han Kim, Gyeonggi-do, KR;
Jang-Soo Kim, Gyeonggi-do, KR;
Soo-Jin Kim, Gyeonggi-do, KR;
Kyoung-Tai Han, Gyeonggi-do, KR;
Hee-Hwan Choe, Incheon-si, KR;
Joo-Han Kim, Gyeonggi-do, KR;
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Abstract
A method of manufacturing a thin film transistor array panel is provided, The method includes: forming a gate line on a substrate; forming a gate insulating layer on the gate line; forming a semiconductor layer on the gate insulating layer; forming a data line and a drain electrode on the semiconductor layer; depositing a passivation layer on the data line and the drain electrode; forming a photoresist including a first portion and a second portion thinner than the first portion on the passivation layer; etching the passivation layer using the photoresist as a mask to expose a portion of the drain electrode at least in part; removing the second portion of the photoresist; depositing a conductive film; and removing the photoresist to form a pixel electrode on the exposed portion of the drain electrode.