The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2009

Filed:

Jun. 26, 2006
Applicants:

Daniel E. Lenoski, San Jose, CA (US);

Jeffrey S. Kuskin, Mountain View, CA (US);

William A. Huffman, Los Gatos, CA (US);

Michael S. Woodacre, Sutton Benger, GB;

Inventors:

Daniel E. Lenoski, San Jose, CA (US);

Jeffrey S. Kuskin, Mountain View, CA (US);

William A. Huffman, Los Gatos, CA (US);

Michael S. Woodacre, Sutton Benger, GB;

Assignee:

Silicon Graphics, Inc., Sunnyvale, GA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 15/167 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and system for managing memory in a multiprocessor system includes defining the plurality of processor coherence domains within a system coherence domain of the multiprocessor system. The processor coherence domains each include a plurality of processors and a processor memory. Shared access to data in the processor memory of each processor coherence domain is provided only to elements of the multiprocessor system within the processor coherence domain. Non-shared access to data in the processor memory of each processor coherence domain is provided to elements of the multiprocessor system within and outside of the processor coherence domain.


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