The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2009

Filed:

Apr. 28, 2006
Applicants:

Matt Yuji Nishimoto, Torrance, CA (US);

Gregory Hoke Rowan, Redondo Beach, CA (US);

Jeffrey Ming-jer Yang, Cerritos, CA (US);

Yun-ho Chung, Redondo Beach, CA (US);

Inventors:

Matt Yuji Nishimoto, Torrance, CA (US);

Gregory Hoke Rowan, Redondo Beach, CA (US);

Jeffrey Ming-Jer Yang, Cerritos, CA (US);

Yun-Ho Chung, Redondo Beach, CA (US);

Assignee:

Northrop Grumman Corporation, Los Angeles, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Transistor devices are provided configured to operate at frequencies above a typical first cutoff frequency. In one aspect, a method is provided for configuring a transistor device to operate above a first cutoff frequency. The method comprises selecting a desired operating frequency range and a desired output power for a transistor associated with the transistor device, analyzing the effects of phase velocity mismatch on the overall gain of a plurality of different sized transistors, and evaluating the primary and secondary gain regions of the plurality of different sized transistors. The method further comprises selecting a transistor sized to provide the desired output power at or close to the desired operating frequency range based on the analysis of the phase velocity mismatch and the evaluation of the primary and secondary gain regions.


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